急...将计算机类英文翻译成中文Rapid VLIW Processor Customization for Signal Processing Applications UsingCombinational Hardware FunctionsThis paper presents an architecture that combines VLIW (very long instructionword) processing with th

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急...将计算机类英文翻译成中文RapidVLIWProcessorCustomizationforSignalProcessingApplicationsUsingCombinationalHard

急...将计算机类英文翻译成中文Rapid VLIW Processor Customization for Signal Processing Applications UsingCombinational Hardware FunctionsThis paper presents an architecture that combines VLIW (very long instructionword) processing with th
急...将计算机类英文翻译成中文
Rapid VLIW Processor Customization for Signal Processing Applications UsingCombinational Hardware Functions
This paper presents an architecture that combines VLIW (very long instructionword) processing with the capability to introduce application-specific customized instructions andhighly parallel combinational hardware functions for the acceleration of signal processingapplications. To support this architecture, a compilation and design automation flow is describedfor algorithms written in C. The key contributions of this paper are as follows: (1) a 4-way VLIWprocessor implemented in an FPGA, (2) large speedups through hardware functions, (3) ahardware/software interface with zero overhead, (4) a design methodology for implementing signalprocessing applications on this architecture, (5) tractable design automation techniques forextracting and synthesizing hardware functions. Several design tradeoffs for the architecture wereexamined including the number of VLIW functional units and register file size. The architecture wasimplemented on an Altera Stratix II FPGA. The Stratix II device was selected because it offers alarge number of high-speed DSP (digital signal processing) blocks that execute multiply-accumulateoperations. Using the MediaBench benchmark suite, we tested our methodology and architecture toaccelerate software. Our combined VLIW processor with hardware functions was compared to that ofsoftware executing on a RISC processor, specifically the soft core embedded NIOS II processor. Forsoftware kernels converted into hardware functions, we show a hardware performance multiplier of upto 230 times that of software with an average 63 times faster. For the entire application in whichonly a portion of the software is converted to hardware, the performance improvement is as much as30X times faster than the nonaccelerated application, with a 12X improvement on average.

急...将计算机类英文翻译成中文Rapid VLIW Processor Customization for Signal Processing Applications UsingCombinational Hardware FunctionsThis paper presents an architecture that combines VLIW (very long instructionword) processing with th
快速定制基于VLIW处理器的信号处理应用UsingCombinational硬件功能
本文介绍的架构,结合了VLIW (很长的instructionword )处理的能力,介绍特定应用定制的指示andhighly并行组合硬件功能来加速信号processingapplications .为了支持这一架构,汇编和设计自动化流程的书面describedfor算法在角的关键贡献本文如下:( 1 ) 4路VLIWprocessor执行一个FPGA芯片上,
搜索( 2 )大型speedups通过硬件的功能,( 3 ) ahardware /软件接口与零开销,( 4 )设计方法执行信号处理应用的这种架构,( 5 )听话的设计自动化技术forextracting和综合硬件功能.几个设计的架构权衡wereexamined包括一些基于VLIW职能单位和登记文件的大小.该架构wasimplemented上了Altera的Stratix II FPGA的.在Stratix II器件被选中,因为它提供alarge一些高速DSP (数字信号处理)模块,执行乘法accumulateoperations .使用MediaBench基准套件,我们测试的方法和架构toaccelerate软件.我们结合了VLIW处理器的功能是与硬件相比,ofsoftware执行的RISC处理器,特别是软核嵌入式Nios II处理器.Forsoftware内核转换成硬件功能,我们会显示出一个硬件性能倍增在2010年230倍,软件,平均63倍的速度.整个应用whichonly部分软件转换为硬件,性能改进既是as30X倍nonaccelerated应用,改善了12倍的平均水平.